Bug 4097 - Mono 2.11 Fails to build on Debian MIPS hardware
Summary: Mono 2.11 Fails to build on Debian MIPS hardware
Status: RESOLVED FIXED
Alias: None
Product: Runtime
Classification: Mono
Component: JIT ()
Version: unspecified
Hardware: Other Linux
: --- normal
Target Milestone: ---
Assignee: Bugzilla
URL:
Depends on:
Blocks:
 
Reported: 2012-03-26 12:09 UTC by Jo Shields
Modified: 2014-01-17 18:05 UTC (History)
5 users (show)

Tags:
Is this bug a regression?: ---
Last known good build:


Attachments
Big endian build log (804.97 KB, text/x-log)
2012-03-26 12:09 UTC, Jo Shields
Details
Little endian build log (803.26 KB, text/x-log)
2012-03-26 12:09 UTC, Jo Shields
Details


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Status:
RESOLVED FIXED

Description Jo Shields 2012-03-26 12:09:33 UTC
Created attachment 1578 [details]
Big endian build log

I've been unable to build Mono on two different Debian MIPS porterboxes.

Eder is a Fuloong 2E little-endian box with the following from cpuinfo:

system type		: lemote-fuloong-2e-box
processor		: 0
cpu model		: ICT Loongson-2 V0.2  FPU V0.1
BogoMIPS		: 441.34
wait instruction	: no
microsecond timers	: yes
tlb_entries		: 64
extra interrupt vector	: no
hardware watchpoint	: yes, count: 0, address/irw mask: []
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 0
VCED exceptions		: not available
VCEI exceptions		: not available

Gabrielli is a Movidis Revolution X16 big-endian box with the following from cpuinfo:

system type		: CUST_WSX16 (CN3860p3.X-500-EXP)
processor		: 0
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 0
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 1
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 1
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 2
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 2
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 3
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 3
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 4
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 4
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 5
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 5
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 6
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 6
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 7
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 7
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 8
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 8
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 9
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 9
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 10
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 10
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 11
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 11
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 12
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 12
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 13
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 13
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 14
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 14
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 15
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 15
VCED exceptions		: not available
VCEI exceptions		: not available
Comment 1 Jo Shields 2012-03-26 12:09:54 UTC
Created attachment 1579 [details]
Little endian build log
Comment 2 Zoltan Varga 2012-03-29 03:28:55 UTC
I was never able to reproduce this on my device.
Comment 3 Rodrigo Kumpera 2014-01-17 18:05:41 UTC
This looks like the bug due to the broken chinese cpu. It was fixed on mainline.